The present invention relates to an analog signal measuring apparatus and, more particularly, to an analog signal measuring apparatus capable of arbitrarily setting a transition probability of a sampling gate in response to a control signal.
Josephson junction devices have a higher switching speed and a lower noise than those of conventional semiconductor devices. Various studies have been extensively made in development of Josephson samplers for sampling a high-speed signal (i.e., a switching characteristic of the Josephson junction device).
Typical examples of these various studies are given as follows:
(1) S. M. Faris, Appl. Phys. Lett. 36 (12), pp. 1005-1007, 1980 PA0 (2) D. B. Tuckerman, Appl. Phys. Lett. 36 (12), pp. 1008-1010, 1980 PA0 (3) C. Hamilton, U.S. Pat. No. 4,245,169, Jan. 13, 1981.
A sampling gate composed of a Josephson junction device is illustrated in FIG. 1, and a conventional analog signal measuring apparatus using the Josephson sampling gate of FIG. 1 is illustrated in FIG. 2. The principle of sampling will be described with reference to FIGS. 1 and 2.
The sampling gate shown in FIG. 1 has magnetic coupling lines for receiving a sampling pulse Ip, a signal Iu to be measured, and a bias current IM. When these input signals are added, and the sum exceeds a threshold current Ic determined by a device current Ib, an output of logic "1" (voltage state: an output of several millivolts) is generated. When the sum is lower than the threshold current Ic, the sampling gate generates an output of logic "0" (superconductive state: an output of 0 mV). Reference symbol OUT1 denotes an output terminal at which the sampler output appears.
A signal generator SGC in the analog signal measuring apparatus in FIG. 2 slightly changes a bias (feedback) current IM in accordance with an output state of a sampling gate circuit SPGC. When a sampling gate SPGC generates an output of logic "1", the bias current IM changes toward a direction in which the output of the sampling gate SPGC is brought to logic "0". Conversely, when the sampling gate SPGC generates an output of logic "0", the bias current IM changes toward a direction in which the output of the sampling gate SPGC is brought to logic "1". In this manner, sampling operation is repeated, and the bias current IM is converged to a value below: EQU Iu+Ip+IM=Ic (1)
When the sampling pulse Ip and the gate threshold current Ic are given to be constant, the signal Iu corresponds to a converged value (i.e., the output from the signal generator SGC) of the bias current IM. When time for supplying the sampling pulse Ip is sequentially delayed with respect to the waveform Iu(t) of the signal to be measured, the instantaneous values at different times of the waveform Iu(t) can be sampled. This sampling technique is the same as the conventional sampling technique.
Referring to FIG. 2, reference symbol SPG denotes a sampling pulse generator for generating the sampling pulse Ip; and ST, a trigger signal for triggering the sampling pulse generator SPG and the signal generator SGC. The sampling gate circuit SPGC constitutes a comparing means which has a plurality of input terminals including a terminal for receiving an analog signal Iu to be measured and a terminal for receiving a bias (feedback) current IM. Each time the sum of all input signals supplied to the input terminals of the comparing means goes beyond or falls below a predetermined threshold value, the output level of the comparing means goes high or low. The signal generator SGC constitutes an integrating means. The integrating means is connected to the output terminal of the sampling gate circuit SPGC. When the trigger signal ST is supplied to the integrating means, the integrating means changes its output signal to generate the bias (feedback) current IM so as to invert the output level of the sampling gate circuit SPGC. The output signal (bias current) from the integrating means is fed back to the input terminal of the sampling gate circuit SPGC. Reference symbol ROC denotes a read circuit for reading out the output from the signal generator SGC in response to a read command signal RCS. The read circuit ROC constitutes a reading means for generating a value corresponding to that of the signal Iu when the output signal from the signal generator SGC in the integrating means is converged.
However, in the conventional analog signal measuring apparatus, a probability (to be referred to as a transition probability hereinafter) for causing the sampling gate to generate an output of logic "1" or "0" is set at approximately 1/2 when the bias current IM supplied as the feedback signal from the signal generator SGC to the sampling gate circuit SPGC is converged. The transition probability cannot be accurately or arbitrarily set.
For example, in a conventional sampling apparatus proposed by C. Hamilton, the bias current IM is read out when the output from the sampling gate is inverted from logic "0" to logic "1". The transition probability at the time of convergence of the bias current IM is not considered.
In a sampling apparatus proposed by D. B. Tuckerman, the transition probability is set to 1/2. However, in order to accurately set the transition probability to 1/2, a sampling gate output at the time of convergence of the bias current IM must be monitored, and a reference voltage must be adjusted such that the number of outputs of logic "1" becomes 1/2 of the number of times of sampling. In this sampling apparatus, when any one of the conditions such as a sampling period, a pulse width of the device current Ib, a delay time of the sampling pulse Ip with respect to the device current Ib, and a gate output changes, it is impossible to accurately and arbitrarily set the transition probability.
A technique for realizing a general-purpose Josephson sampling apparatus which eliminates the indefinite factors for the transition probability and which assures desired setting of the transition probability even if the conditions change is described by Tazoh et al., "Josephson Sampling Technique and its Application", Proceedings of the Institute of Electronics Engineers, Ed. 83-63, p. 49.
In a Josephson sampling apparatus described in the above proceedings, the drawbacks of the sampling apparatus proposed by Tuckerman can be eliminated, i.e., even if the Tuckerman's conditions described above change, the transition probability will not change (in the proceedings, 50%). But it is not an apparatus that can set the transition probability accurately and arbitrarily.